STMicroelectronics introduces advanced single-channel gate driver chips
ST introduces the advanced single-channel gate driver chip STGAP1S. The new product integrates galvanic isolation and analog and logic circuitry on the same chip, helping designers simplify driver design. At the same time, ensure that the product has excellent noise immunity, and achieve safe and reliable power control effect.
The STGAP1S is the first of ST's new generation of gapDRIVE™ gate drives. The new product integrates ST's unique bipolar CMOS-DMOS (BCD) manufacturing process and innovative technology for embedding isolation layers on the chip to further improve system integration. The high voltage rail can withstand up to 1500V voltage without interfering with other circuits; The high reliability makes it suitable for industrial drives, high-power 600V or 1200V inverters, solar inverters, and uninterruptible power supplies.
The 100ns electrical isolation layer signal propagation delay enables STGAP1S to transmit high-precision PWM signals. The input or source current of the new product integrated driver stage is up to 5A; Rail-to-rail outputs support negative drive voltages and can be used with large Insulated Gate Bipolar Transistors (IGBTs) or wide-bandgap power switches (such as silicon carbide MOSFETs). The new product has excellent common-mode transient immunity and can withstand common-mode transient voltages exceeding ±50V/ns, enabling communication across electrical isolation layers and a safe operating environment. Separate input and source-out designs increase design flexibility and help reduce the use of external components.
The new product can communicate with the main controller through the built-in SPI port, an industry standard interface, and the internal control logic can monitor the working status in real time. STGAP1S provides a wealth of diagnostic information to the primary controller through this interface to further improve system protection performance and reliability.
The new smart drive also integrates a number of protection features to help the chip maximize its reliability in harsh industrial environments. These protection features include power-level active Miller clamp to prevent unwanted transistor conduction; desaturation detection of protective switches under short-circuit conditions; collector-emitter overvoltage protection against hazardous overvoltages and output double-level shutdown; over-temperature protection (UVLO), Under-Voltage Lockout (UVLO) and over-voltage protection (OVLO) Over-Voltage Lockout and over-current detection pin.
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