Xilinx introduces an extended family of forward error correcting IP cores

     Xilinx has announced an extended family of forward error correction (FEC) IP cores. The family includes GFEC, eFEC, and high-gain FEC (xFEC) solutions to control signal transmission errors, extend transmission distance, and reduce the number of regenerators on the route, thereby helping to reduce network operators' operating expenses and capital expenditures.

     FEC IP cores designed by Xilinx use common interfaces to accelerate product development, minimize system-level integration time, maximize design reuse, and reduce time to market. Ultra-small, high-performance FEC cores include GFEC IP cores for 2.5G, 10G, 40G, 100G applications, traditional 10G eFEC, and xFEC Extended FEC (xFEC) IP cores for 100G applications, optimized specifically for XFEC FPgas. The chip footprint is reduced compared to non-Xilinx IP cores, making it the smallest FEC core available today. Xilinx is also working to launch a 400G GFEC for cutting-edge applications, which is expected to be available in the second quarter of 2013. Combined with partial reconfiguration technology, these IP cores optimized for Xilinx FPgas enable customers to apply multiple FEC standards across multiple interfaces, while saving product costs, reducing power consumption, and maximizing network interoperability.

     Nick Possley, senior director of wired communications at Silinx, said: "As bandwidth demands increase and error delay tolerations decrease, system designers are looking for new ways to extend available bandwidth and improve transmission quality. To address these challenges, xFEC, an extended family of FEC IP cores, is available for 2.5G, 10G, 40G, 100G and 400G applications, further strengthening our leading position in the OTN market. "The power consumption and performance benefits of the 7 Series FPGA products combined with FEC products can help customers in OTN applications increase data rates, increase bandwidth, and reduce system costs."

     The use of FEC technology enables error control between the signal source (transmitter), which sends redundant signals, and the signal endpoint (receiver), which recognizes data without obvious errors. FEC can be used in all OTN systems, and its coding gain helps users correct errors that may occur when distance increases and SNR decreases, while keeping the error rate unchanged at the remote receiver, thus extending the distance that signals can be sent.

     Different FEC schemes provide different coding gains. The higher the encoding gain, the longer the optical signal will travel. For example, xFEC 100G Extended FEC (xFEC) offers industry-leading 9.4dB NECG with 6.7% OH and 6.7% OH, extending 100G transmission distance while reducing 100G transmission power consumption.

     FEC's coding gain can be used to perform a variety of functions, including increasing the maximum connection distance and/or number of  connections to extend system coverage. It is also beneficial to increase the number of dense wave distribution (DWDM) channels in the system (the number of channels is usually limited by the output power of the amplifier used). Coding gain also reduces unit channel power consumption, increases the number of channels, reduces requirements for component parameters on a given link (such as transmit power, eye mask, extinction ratio, noise washing, filter isolation, etc.), and saves component costs.