Renesas introduces three Ultra-Low Pressure Differential Linear Regulators (Ldos)
Renesas has introduced three ultra-low pressure differential linear regulators (Ldos) - ISL80111, ISL80112 and ISL80113 - to provide the best balance between performance, size and power consumption for size-constrained designs in data communications, computing, storage and medical applications.
The three Ldos have output currents of 1A, 2A, and 3A, with typical ultra-low pressure differential values of 27mV, 53mV, and 75mV respectively at output currents of 1A, 2A, and 3A, and are optimized for low voltage conversion. When the three Ldos operate in the input voltage range of 1V to 3.6V and the bias voltage range of 2.9V to 5.5V, the Vout output voltage regulation range is 0.8V to 3.3V. With an input voltage supply rejection ratio greater than 40dB at 100kHz, these three Ldos are ideal for noise sensitive applications. These three chips guarantee ± 1.6% output voltage accuracy, enabling them to provide accurate voltage for the latest low-voltage digital ics.
The enable inputs for the ISL80111, ISL80112 and ISL80113 allow the device to enter low static current shutdown mode. The three products in this family use submicron CMOS processes to provide best-in-class analog performance and overall value for applications requiring input voltage conversion typically below 2.5V. They also feature excellent load transient regulation unique to NMOS power levels. These three Ldos consume significantly lower static current as a load function compared to bipolar Ldos.
The ISL80111, ISL80112 and ISL80113 are available in small 10-pin 3x3 DFN packages, whose physical and pin assignments are shown in Figure 1. Typical application circuits of the chip are shown in Figure 2, mainly used in noise-sensitive instruments and medical systems, data acquisition and data communication systems, storage, telecommunications and server equipment, low-voltage DSP, FPGA and ASIC core power supplies, and post-stage regulation of switching mode power supplies.
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